1. Field of the Illustrative Embodiments
The present illustrative embodiments relate generally to a method and system for dispatching instructions in a microprocessor. Still more particularly, the illustrative embodiments are directed to a more efficient method and system for managing out of order instruction streams.
2. Description of the Related Art
A typical super scalar processor is a complicated concurrent operation machine. A disadvantage with the current method of operation is keeping order of the dispatched sequence between the dispatched and executed instruction stream, especially if the super scalar machine is involved with an out of order dispatched instruction stream. Traditional solutions do not provide adequate approaches for the issuing and managing of instructions in super-scalar microprocessors.